Raspberry Pi /RP2350 /OTP_DATA_RAW /FLASH_DEVINFO

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FLASH_DEVINFO

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CS1_GPIO0 (D8H_ERASE_SUPPORTED)D8H_ERASE_SUPPORTED 0 (NONE)CS0_SIZE 0 (NONE)CS1_SIZE

CS1_SIZE=NONE, CS0_SIZE=NONE

Description

Stores information about external flash device(s). (ECC)

Assumed to be valid if BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is set.

Fields

CS1_GPIO

Indicate a GPIO number to be used for the secondary flash chip select (CS1), which selects the external QSPI device mapped at system addresses 0x11000000 through 0x11ffffff. There is no such configuration for CS0, as the primary chip select has a dedicated pin.

On RP2350 the permissible GPIO numbers are 0, 8, 19 and 47.

Ignored if CS1_size is zero. If CS1_SIZE is nonzero, the bootrom will automatically configure this GPIO as a second chip select upon entering the flash boot path, or entering any other path that may use the QSPI flash interface, such as BOOTSEL mode (nsboot).

D8H_ERASE_SUPPORTED

If true, all attached devices are assumed to support (or ignore, in the case of PSRAM) a block erase command with a command prefix of D8h, an erase size of 64 kiB, and a 24-bit address. Almost all 25-series flash devices support this command.

If set, the bootrom will use the D8h erase command where it is able, to accelerate bulk erase operations. This makes flash programming faster.

When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, this field defaults to false.

CS0_SIZE

The size of the flash/PSRAM device on chip select 0 (addressable at 0x10000000 through 0x10ffffff).

A value of zero is decoded as a size of zero (no device). Nonzero values are decoded as 4kiB << CS0_SIZE. For example, four megabytes is encoded with a CS0_SIZE value of 10, and 16 megabytes is encoded with a CS0_SIZE value of 12.

When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, a default of 12 (16 MiB) is used.

0 (NONE): undefined

1 (8K): undefined

2 (16K): undefined

3 (32K): undefined

4 (64k): undefined

5 (128K): undefined

6 (256K): undefined

7 (512K): undefined

8 (1M): undefined

9 (2M): undefined

10 (4M): undefined

11 (8M): undefined

12 (16M): undefined

CS1_SIZE

The size of the flash/PSRAM device on chip select 1 (addressable at 0x11000000 through 0x11ffffff).

A value of zero is decoded as a size of zero (no device). Nonzero values are decoded as 4kiB << CS1_SIZE. For example, four megabytes is encoded with a CS1_SIZE value of 10, and 16 megabytes is encoded with a CS1_SIZE value of 12.

When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, a default of zero is used.

0 (NONE): undefined

1 (8K): undefined

2 (16K): undefined

3 (32K): undefined

4 (64k): undefined

5 (128K): undefined

6 (256K): undefined

7 (512K): undefined

8 (1M): undefined

9 (2M): undefined

10 (4M): undefined

11 (8M): undefined

12 (16M): undefined

Links

() ()